000 00642nam a22001817a 4500
001 ched26975175
005 20240425163244.0
008 150126t xxu||||| |||| 00| 0 eng d
050 _aT-01665
099 _c8068
_d8068
100 _aCagayat, Sheila Carmina J.
245 _aVerification of xilinx ise 14.1 and xilinx spartan-6 lx16 fpga board by implementing fpga design flow using verilog hdi
_cSheila Carmina J. Cagayat
260 _aMakati City
_bMapua Institute of Technology
_c2014
300 _aviii, 104p.
502 _aMaster of Engineering Program
_bElectronics Engineering
630 _aElectronics Engineering
942 _cTD
999 _c7138
_d7138